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IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
Pin Configurations
TOP VIEW
16
15
14
13
16
15
14
13
N.C.
V DD
DET
I.C.
1
2
3
4
+
*EP
5
MAX5982A
MAX5982B
6
7
8
12
11
10
9
CLS
2EC
PG
WAD
N.C.
V DD
DET
I.C.
1
2
3
4
+
*EP
5
MAX5982C
6
7
8
12
11
10
9
CLS
2EC
PG
WAD
TQFN
TQFN
*CONNECT EP TO V SS .
Pin Description
PIN
MAX5982A/
MAX5982B
1
2
3
4
5, 6
MAX5982C
1, 13–16
2
3
4
5, 6
NAME
N.C.
V DD
DET
I.C.
V SS
FUNCTION
No Connection. Not internally connected.
Positive Supply Input. Connect a 68nF (min) bypass capacitor between V DD and V SS .
Detection Resistor Input. Connect a signature resistor (R DET = 24.9k I ) from DET to V DD .
Internally Connected. Leave unconnected.
Negative Supply Input. V SS connects to the source of the integrated isolation n-channel
power MOSFET.
Drain of Isolation MOSFET. RTN connects to the drain of the integrated isolation
7, 8
7, 8
RTN
n-channel power MOSFET. Connect RTN to the downstream DC-DC converter ground as
shown in the Typical Application Circuit .
Wall Power Adapter Detector Input. Wall adapter detection is enabled the moment
V DD - V SS crosses the mark event threshold. Detection occurs when the voltage from
9
9
WAD
WAD to RTN is greater than 9V. When a wall power adapter is present, the isolation
n-channel power MOSFET turns off and 2EC current sink turns on. Connect WAD directly
to RTN when the wall power adapter or other auxiliary power source is not used.
Open-Drain, Power-Good Indicator Output. PG sinks 230 F A to disable the downstream
DC-DC converter while turning on the hot-swap MOSFET switch. PG current sink is
10
10
PG
disabled during detection, classification, and in the steady-state power mode. The PG
current sink is turned on to disable the downstream DC-DC converter when the device is
in sleep mode.
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7
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